16 - Using Synchronous Models for the Design of Parallel Embedded Systems [ID:2952]
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The following content has been provided by the University of Erlangen-Nürnberg.

To my talk, it's about recent things that we are exploring in our Everest system, which

is about the use of synchronous models. So I would rather say models than languages,

because what you will see later is that we will concentrate really on the model of computation,

and not so much on particular languages. So the use of these models for the design of

parallel systems, and in particular for the design of... Just a moment, I think I first

have to switch it on. Okay. Is it working? Okay, fine. So in particular, the goal is

to generate embedded systems, but we can also view that more general in the design of parallel

systems, because it is also interesting for the design of distributed systems, which is

becoming now more and more a research topic in our group. So for the talk, I plan to give

a first rough idea of what model-based design is. I think that is almost clear, but I still

want to motivate the thing, why we think that is a useful approach. Then I want to consider

a few main models of computation. I try to keep that short, but I want to point out always

two or three main consistency problems that are there for the one or the other model of

computation, and these consistency problems have to be solved before we can start with

synthesis. In particular, I want to consider data-driven models and clock-driven models,

because event-driven models can be seen as a generalisation of both, and I think you

know that already. So these are languages like VHDL, Verilog, and so on. And then I

want to give a short introduction to our Everest tool. So that is a tool that we are constantly

building, so it's not a completed tool. It's always under construction, of course, because

research is always continuing and going on. So what we will do there, what I want to show

you briefly, is we translate systems into what we call guarded actions, and that is

a very useful thing to do, because that reduces the models to the core of the model of computation

and frees it from the syntax of the languages. Then we have to perform some analysis, and

then I want to mention the recent approaches we do for the synthesis of parallel software

or parallel distributed systems. So I think I can skip the first slides that describe

what embedded systems are. I think you know that we have systems consisting of hardware

and software, which are application-specific, talking to an environment by sensors and actors,

and you know that there are many industries that depend on embedded systems. So there

are impressive numbers that show that embedded systems design is responsible for the economic

success of many products. And it is also known that the design of these systems is very difficult.

It is already difficult to write working software, and it is much more difficult to design embedded

systems, because here we have not only to face the problem to write software, we also

have to adapt it to heterogeneous hardware architectures, and besides the functional

correctness, we also have to take care of non-functional properties like energy consumption,

real-time capabilities, reliability, and other problems that have to be considered here and

make the design much more difficult than traditional software or hardware design alone.

So the problem is now that, and this is the problem we want to face and to consider, that

in some sense we have to consider here a tower of Babylon, because many languages are used

for the design. Not only a lot of hardware architectures, also many languages, for good

reasons, because there are particular applications that demand for special languages. For example,

for simulation, there are special languages like System C, Simulink, that are well suited

for simulation. They are fast for doing simulation. For specification, there are also other languages

like PSL, the property specification language that has been standardized, and others. So

here the issue is to have a precise formal semantics that exactly says at which point

in time things have to occur. So here the preciseness and correctness is an issue. And

then of course for software, the main languages are C and C++ still, and for hardware also

there are special languages where typical tools expect them as input languages. So the

problem is we have to consider many languages here for good reasons, because the different

applications benefit from the different languages here, but the typical design also then demands

Presenters

Prof. Dr. Klaus Schneider Prof. Dr. Klaus Schneider

Zugänglich über

Offener Zugang

Dauer

00:55:12 Min

Aufnahmedatum

2013-05-24

Hochgeladen am

2013-07-18 09:43:37

Sprache

de-DE

To meet required real-time constraints, modern embedded systems have to perform many tasks in parallel and therefore require the modeling of concurrent systems with an adequate notion of time. To this end, several models of computation (MoCs) have been defined that determine why (causality), when (time), which atomic action of the system is executed. The most important classes of MoCs are event-triggered, time/clock-triggered, and data-driven MoCs that have their on advantages and disadvantages. This talk gives an overview on the design flow used in the Averest system developed at the University of Kaiserslautern. The heart of this design flow is a synchronous (clock-driven) MoC which is used for modeling, simulation, and formal verification. The use of a synchronous MoC offers many advantages for these early design phases. For the synthesis, however, it is for some target architectures difficult to maintain the synchronous MoC, and therefore transformations are applied to translate the original models into other MoCs. In particular, we consider transformations that allow developers to desynchronize the system into asynchronous components which is a new technique to synthesize distributed/multithreaded systems from verified synchronous models.

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