Hardware-Beschreibungssprache VHDL [SerienID : 2357]
Semester
Sommersemester 2021
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StudOn-Zugang
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2021-04-14 01:41:44
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# 1StudOn-ZugangHw-Bs VHDL Lec-1 (1-15)Dipl.-Ing. Jürgen Frickel2021-04-14 Sommersemester 20211Hw-Bs VHDL Lec-1 (1-15)Dipl.-Ing. Jürgen Frickel2021-04-14 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 2StudOn-ZugangHw-Bs VHDL Lec-2 (16-59)Dipl.-Ing. Jürgen Frickel2021-04-20 Sommersemester 20212Hw-Bs VHDL Lec-2 (16-59)Dipl.-Ing. Jürgen Frickel2021-04-20 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 3StudOn-ZugangHw-Bs VHDL Lab-1Dipl.-Ing. Jürgen Frickel2021-05-10 Sommersemester 20213Hw-Bs VHDL Lab-1Dipl.-Ing. Jürgen Frickel2021-05-10 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 4StudOn-ZugangHw-Bs VHDL Lec-3 (53-55, 60-95)Dipl.-Ing. Jürgen Frickel2021-05-04 Sommersemester 20214Hw-Bs VHDL Lec-3 (53-55, 60-95)Dipl.-Ing. Jürgen Frickel2021-05-04 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 5StudOn-ZugangHw-Bs VHDL Lab-2Dipl.-Ing. Jürgen Frickel2021-05-11 Sommersemester 20215Hw-Bs VHDL Lab-2Dipl.-Ing. Jürgen Frickel2021-05-11 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 6StudOn-ZugangHw-Bs VHDL Lec-4 (96-119)Dipl.-Ing. Jürgen Frickel2021-05-18 Sommersemester 20216Hw-Bs VHDL Lec-4 (96-119)Dipl.-Ing. Jürgen Frickel2021-05-18 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 7StudOn-ZugangHw-Bs VHDL Lec-5 (120-142)Dipl.-Ing. Jürgen Frickel2021-06-01 Sommersemester 20217Hw-Bs VHDL Lec-5 (120-142)Dipl.-Ing. Jürgen Frickel2021-06-01 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 8StudOn-ZugangHw-Bs VHDL Lab-3 (Task)Dipl.-Ing. Jürgen Frickel2021-06-12 Sommersemester 20218Hw-Bs VHDL Lab-3 (Task)Dipl.-Ing. Jürgen Frickel2021-06-12 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 9StudOn-ZugangHw-Bs VHDL Lab-3 (Solution)Dipl.-Ing. Jürgen Frickel2021-06-12 Sommersemester 20219Hw-Bs VHDL Lab-3 (Solution)Dipl.-Ing. Jürgen Frickel2021-06-12 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 10StudOn-ZugangHw-Bs VHDL Lec-6 (143-164)Dipl.-Ing. Jürgen Frickel2021-06-15 Sommersemester 202110Hw-Bs VHDL Lec-6 (143-164)Dipl.-Ing. Jürgen Frickel2021-06-15 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 11StudOn-ZugangHw-Bs VHDL Lab-4 (Task)Dipl.-Ing. Jürgen Frickel2021-06-22 Sommersemester 202111Hw-Bs VHDL Lab-4 (Task)Dipl.-Ing. Jürgen Frickel2021-06-22 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 12StudOn-ZugangHw-Bs VHDL Lab-4 (Solution)Dipl.-Ing. Jürgen Frickel2021-06-22 Sommersemester 202112Hw-Bs VHDL Lab-4 (Solution)Dipl.-Ing. Jürgen Frickel2021-06-22 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 13StudOn-ZugangHw-Bs VHDL Lab-4 (Simulation)Dipl.-Ing. Jürgen Frickel2021-06-22 Sommersemester 202113Hw-Bs VHDL Lab-4 (Simulation)Dipl.-Ing. Jürgen Frickel2021-06-22 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 14StudOn-ZugangHw-Bs VHDL Lec-7 (165-198)Dipl.-Ing. Jürgen Frickel2021-06-24 Sommersemester 202114Hw-Bs VHDL Lec-7 (165-198)Dipl.-Ing. Jürgen Frickel2021-06-24 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 15StudOn-ZugangHw-Bs VHDL Lec-8 (198-236)Dipl.-Ing. Jürgen Frickel2021-07-06 Sommersemester 202115Hw-Bs VHDL Lec-8 (198-236)Dipl.-Ing. Jürgen Frickel2021-07-06 Sommersemester 2021StudOn-ZugangGesperrt clip
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# 16StudOn-ZugangHw-Bs VHDL Lec-9 (237-Ende) + Klausur-DiskussionDipl.-Ing. Jürgen Frickel2021-07-13 Sommersemester 202116Hw-Bs VHDL Lec-9 (237-Ende) + Klausur-DiskussionDipl.-Ing. Jürgen Frickel2021-07-13 Sommersemester 2021StudOn-ZugangGesperrt clip
