27 - Building, programming, and validating low-power heterogeneous multi-core image processors [ID:4749]
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First of all, I should thank the previous speaker because I couldn't have wished for

a more perfect introduction to...

Closing statements are the most perfect introduction to what I would want to say and what I typically

say when I present what it is that we do and what it is that we hope for others to help

us with.

Even though the kinds of architectures that he is researching are completely different

from what it is that we do.

He spoke about Intel processors and Intel designs and what I'm going to be showing

you is also Intel but a completely different Intel and the processors are completely different.

Although there's a lot of similarity and I think the final conclusions would by and

large in fact be the same which is very interesting since we come from so different domains, operating

systems versus processor construction technology, high performance computing versus the lowest

possible let's say image most highly embedded image processing within mobile phones.

So it's interesting to see that we have still so many similarities and in particular have

so many fairly common problems to solve.

So this is work, now it does.

I'll present to you a set of slides that I prepared for Doug last year and presented

at Doug last year and just by the way stop me if you have questions I don't mind I like

this to be interactive.

I know we are being videotaped nevertheless I think that questions are more interesting

than just having me just ramble on some text.

Secondly if this thing will proceed, there we go.

Legal notices right I may be an Intel employee but what I'm saying don't take this as anything

literally Intel or anything sanctioned by Intel per se.

I checked it with my boss Arjun he agrees to what it is that's on the slides but don't

read anything else into it.

So I'll present to you the group within Intel that I'm currently with.

I'll present to you also the way we construct processors and multiprocessor systems.

I'll also speak about why these kinds of processors happen to be particularly interesting for

the domain that I am now active in imaging image processing.

Why is image processing as a domain an interesting domain to be in at least for us for Intel

maybe for you and why does that involve eventually some fairly large and complex architectures

in fact and I hope to get to the point where I can discuss a few software firmware architecture

complexity and tooling related topics that do I think have a lot of relation to what

the previous speaker was saying although probably handled from a completely different angle

and then maybe I'll get to conclusions in the end who knows.

If you stop me often enough I won't get there but then it probably would be fun anyway.

So who are we Intel ICG imaging and camera technologies group.

We are basically the continuation of and Jurgen gave the introduction Silicon Hive.

Silicon Hive was indeed founded as a business line within Philips with the objective to

basically monetize some research that was done within Philips.

We came together and I was there in 2002 we came together with 12 researchers and we decided

to found the company and for researchers founding a company that is hard that it will bring

you in places where you've not been it will bring you out of your comfort zone but it's

at the same time very interesting and we did that for a couple of years under the Philips

guidance let's say and we didn't get very far.

We made that technology we actually made a 30 core chip that was meant for video getting

digital video broadcasts and getting it was a software defined radio project getting digital

video broadcasts from the air made 30 processors or it was all in software but 30 different

processors all different but it didn't go very far right it was for Philips at the time

Presenters

Dr. Menno Lindwer Dr. Menno Lindwer

Zugänglich über

Offener Zugang

Dauer

01:00:04 Min

Aufnahmedatum

2015-03-27

Hochgeladen am

2015-04-02 11:04:49

Sprache

de-DE

This talk highlights challenges and contributions in worst-case execution time analysis for real-time system considering architectural changes over time and discusses future trends and open research problems.

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