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Thank you very much, Jürgen, for the very nice introduction and for inviting me here.

So it's very nice to be here. I've been, several years ago I was here for several weeks also visiting

Professor Teich's group for some time and we have known each other for over 20 years and had some very nice

joint work together over the years. So it's really very nice to be visiting.

And my talk will be about data flow techniques for multi-core signal processors.

Data flow is very much a central theme in my research group at University of Maryland

where we look at CAD techniques for signal processing applications where data flow is very fundamental in that application area.

So this is what I'll be talking about today. I'll be giving you a review of some background and motivation

for multi-core signal processors as an important class of hardware platforms

and motivating some new types of application mapping problems for this kind of platform.

And then talking about two new directions that we've been looking at in the scheduling for these platforms.

One is for taking into account parallelism inside actors as well as at the graph level.

It's very conventional. It's been, scheduling techniques have been looked at a lot at the graph level

where we try to exploit parallelism between the actors, but it's more of an emerging topic

how to also incorporate the parallelism inside the actors.

So I'll talk about some models and approaches for scheduling that takes into account the parallelism inside the actors.

And then I'll be talking also about a method for partial expansion of synchronous data flow graphs

as a way to have more efficient scheduling methods also especially that work with multi-rate signal processing applications.

And this is an introduction to my research group, several PhD students and a few more students

including some internship students like Alexandra who was visiting from INSA in Rennes.

So this is kind of an overview of what we do in my research group.

The objective is to develop domain specific methods that cover the class, the broad class of signal processing applications

and look at ways to model these applications in different types of programming environments.

Mostly they are data flow based environments that capture this kind of block diagram structure in these applications

and then try to exploit the structure of those applications to optimize the hardware or software

or to make the implementations more reliable.

And the goal is also to handle a variety of different types of signal processing application areas

ranging from high performance kind of multi-dimensional signal processing applications

to lower performance or cost constrained types of sensor network applications

and other important areas like wireless communications.

So all of these have challenging kinds of constraints in different dimensions

and so we want to capture those kind of application structures using data flow graphs

and use various kinds of high level graph analysis to address these complex constraints

and also to address the diverse kinds of platforms that you are all familiar with for embedded systems

like programmable multi-core signal processors and GPUs, FPGAs, microcontrollers and other types of devices.

So my particular talk today will focus on this class of platforms, programmable DSPs

which have some interesting trade-offs associated with them that make them interesting

even though I think in recent years GPUs have been getting a lot more attention probably

in the signal processing implementation research community

partly I think because they are newer and also they provide some really interesting new trade-offs

in terms of cost and performance and power.

But also there have been advances in multi-core signal processing devices

and what I'll be talking about today is a research that has been motivated by those

and sponsored partly also by Texas Instruments who has sponsored some PhD students in my group to look in this direction.

So this is just showing some kinds of trade-offs.

We know that GPUs achieve for some representative devices

and we know that GPUs achieve now very high level of absolute performance

but still if you look at the overall picture in terms of power consumption and cost and performance

especially for targeted kinds of applications that these DSPs are designed for