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Embedded Systems 2020/2021 /CoursesID:1501
- Most recent entry on 2020-09-01
Keywords:
real
signals
minimization
conflict
tools
process
bus
transition
compiler
complexity
integer
algorithm
point
program
color
bit
space
computation
protocol
segment
Lecturer
Prof. Dr. Jürgen Teich
Organisational Unit
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Recording type
Vorlesungsreihe
Via
Studon
Language
Associated Clips
Episode
Title
Lecturer
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1
Introduction Part 1
Prof. Dr. Jürgen Teich
2020-08-24
Studon
01:36:35
slides
slides
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2
Introduction Part 2
Prof. Dr. Jürgen Teich
2020-08-24
Studon
00:51:35
slides
slides
audio
captions
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3
Specification-and-Modeling - Part 1
Prof. Dr. Jürgen Teich
2020-08-25
Studon
01:40:10
slides
slides
audio
captions
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4
Specification-and-Modeling - Part 2
Prof. Dr. Jürgen Teich
2020-08-25
Studon
01:15:06
slides
slides
audio
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5
Specification-and-Modeling - Part 3
Prof. Dr. Jürgen Teich
2020-08-26
Studon
01:33:45
slides
slides
audio
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6
Hardware-Synthesis - Part 1
Prof. Dr. Jürgen Teich
2020-08-26
Studon
00:57:38
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audio
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7
Hardware-Synthesis - Part 2
Prof. Dr. Jürgen Teich
2020-08-27
Studon
01:22:54
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slides
audio
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8
Hardware-Synthesis - Part 3
Prof. Dr. Jürgen Teich
2020-08-27
Studon
01:02:02
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slides
audio
captions
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9
Hardware-Synthesis - Part 4
Prof. Dr. Jürgen Teich
2020-08-28
Studon
01:30:53
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slides
audio
captions
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10
Hardware-Synthesis - Part 5
Prof. Dr. Jürgen Teich
2020-08-28
Studon
01:02:44
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slides
audio
captions
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11
Software-Synthesis - Part 1
Prof. Dr. Jürgen Teich
2020-08-31
Studon
01:24:04
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slides
audio
captions
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12
Software-Synthesis - Part 2
Prof. Dr. Jürgen Teich
2020-08-31
Studon
01:41:13
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slides
audio
captions
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13
Software-Synthesis - Part 3
Prof. Dr. Jürgen Teich
2020-09-01
Studon
01:41:04
slides
slides
audio
captions
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14
Software-Synthesis - Part 4
Prof. Dr. Jürgen Teich
2020-09-01
Studon
00:58:49
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slides
audio
captions
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Prof. Dr. Jürgen Teich
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2020-05-06
Studon
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